The present invention relates to a method for driving a semiconductor memory including a ferroelectric capacitor.
A first conventional example of a semiconductor memory including a ferroelectric capacitor is composed of, as shown in FIG. 15, a field effect transistor (hereinafter referred to as an FET) 1 and a ferroelectric capacitor 2, and a bit line BL is connected to a drain region 1a of the FET 1, an upper electrode of the ferroelectric capacitor 2 is connected to a source region 1b of the FET 1 and a word line WL is connected to a gate electrode 1c of the FET 1.
The semiconductor memory of the first conventional example employs the destructive read-out system in which a recorded data is erased in reading the data. Therefore, a rewrite operation is necessary to conduct after reading a data, and hence, an operation for reversing the polarization direction of a ferroelectric film (polarization reversing operation) should be carried out after every data read operation.
Since a phenomenon of polarization fatigue occurs in a ferroelectric film, the polarizing characteristic of the ferroelectric film is largely degraded when the polarization reversing operation is repeatedly carried out.
As a countermeasure, a semiconductor memory of a second conventional example shown in FIG. 16 has been proposed. The semiconductor memory of the second conventional example employs the non-destructive read-out system in which a lower electrode 2b of a ferroelectric capacitor 2 is connected to a gate electrode 1c of an FET 1 so as to use the ferroelectric capacitor 2 for controlling the gate potential of the FET 1. In FIG. 16, a reference numeral 3 denotes a substrate.
In writing a data in the semiconductor memory of the second conventional example, a writing voltage is applied between an upper electrode 2a of the ferroelectric capacitor 2 serving as a control electrode and the substrate 3.
For example, when a data is written by applying a voltage (control voltage) positive with respect to the substrate 3 to the upper electrode 2a, downward polarization is caused in a ferroelectric film 2c of the ferroelectric capacitor 2. Thereafter, even when the upper electrode 2a is grounded, positive charge remains in a gate electrode 1c of the FET 1, and hence, the gate electrode 1c has positive potential.
When the potential of the gate electrode 1c exceeds the threshold voltage of the FET 1, the FET 1 is in an on-state. Therefore, when a potential difference is caused between a drain region 1a and a source region 1b of the FET 1, a current flows between the drain region 1a and the source region 1b. Such a logical state of the ferroelectric memory is defined, for example, as xe2x80x9c1xe2x80x9d.
On the other hand, when a voltage negative with respect to the substrate 3 is applied to the upper electrode 2a of the ferroelectric capacitor 2, upward polarization is caused in the ferroelectric film 2c of the ferroelectric capacitor 2. Thereafter, even when the upper electrode 2a is grounded, negative charge remains in the gate electrode 1c of the FET 1, and hence, the gate electrode 1c has negative potential. In this case, the potential of the gate electrode 1c is always smaller than the threshold voltage of the FET 1, and hence, the FET 1 is in an off-state. Therefore, even when a potential difference is caused between the drain region 1a and the source region 1b, no current flows between the drain region 1a and the source region 1b. Such a logical state of the ferroelectric memory is defined, for example, as xe2x80x9c0xe2x80x9d.
Even when the power supply to the ferroelectric capacitor 2 is shut off, namely, even when the voltage application to the upper electrode 2a of the ferroelectric capacitor 2 is stopped, the aforementioned logical states are retained, and thus, a nonvolatile memory is realized. Specifically, when power is supplied again to apply a voltage between the drain region 1a and the source region 1c after shutting off the power supply for a given period of time, a current flows between the drain region 1a and the source region 1b if the logical state is xe2x80x9c1xe2x80x9d, so that the data xe2x80x9c1xe2x80x9d can be read, and no current flows between the drain region 1a and the source region 1b if the logical state is xe2x80x9c0xe2x80x9d, so that the data xe2x80x9c0xe2x80x9d can be read.
In order to correctly retain a data while the power is being shut off (which characteristic for retaining a data is designated as a retention characteristic), it is necessary to always keep the potential of the gate electrode 1c of the FET 1 to be higher than the threshold voltage of the FET 1 when the data is xe2x80x9c1xe2x80x9d and to always keep the potential of the gate electrode 1c of the FET 1 at a negative voltage when the data is xe2x80x9c0xe2x80x9d.
While the power is being shut off, the upper electrode 2a of the ferroelectric capacitor 2 and the substrate 3 have ground potential, and hence, the potential of the gate electrode 1c is isolated. Therefore, ideally, as shown in FIG. 17, a first intersection c between a hysteresis loop 4 obtained in writing a data in the ferroelectric capacitor 2 and a gate capacitance load line 7 of the FET 1 obtained when a bias voltage is 0 V corresponds to the potential of the gate electrode 1c obtained in storing a data xe2x80x9c1xe2x80x9d, and a second intersection d between the hysteresis loop 4 and the gate capacitance load line 7 corresponds to the potential of the gate electrode 1c obtained in storing a data xe2x80x9c0xe2x80x9d. In FIG. 17, the ordinate indicates charge Q appearing in the upper electrode 2a (or the gate electrode 1c) and the abscissa indicates a voltage V.
Actually, however, the ferroelectric capacitor 2 is not an ideal insulator but has a resistance component, and hence, the potential of the gate electrode 1c drops through the resistance component. This potential drop is exponential and has a time constant obtained by multiplying parallel combined capacitance of the gate capacitance of the FET 1 and the capacitance of the ferroelectric capacitor 2 by the resistance component of the ferroelectric capacitor 2. The time constant is approximately 104 seconds at most. Accordingly, the potential of the gate electrode 1c is halved within several hours.
Since the potential of the gate electrode 1c is approximately 1 V at the first intersection c as shown in FIG. 17, when the potential is halved, the potential of the gate electrode 1c becomes approximately 0.5 V, which is lower than the threshold voltage of the FET 1 (generally of approximately 0.7 V). As a result, the FET 1 that should be in an on-state is turned off in a short period of time.
In this manner, although the ferroelectric memory using the ferroelectric capacitor for controlling the gate potential of the FET has an advantage that a rewrite operation is not necessary after a data read operation, it has the following problem: The gate electrode of the FET obtains potential after writing a data, and the ability for keeping the gate potential determines the retention characteristic. Since the time constant until discharge of the ferroelectric capacitor is short, the data retaining ability is short, namely, the retention characteristic is not good.
In consideration of the aforementioned conventional problem, an object of the invention is improving the retention characteristic of a semiconductor memory including a ferroelectric capacitor for storing a multi-valued data in accordance with a displacement of polarization of a ferroelectric film.
In order to achieve the object, the first method of this invention for driving a semiconductor memory including a ferroelectric capacitor for storing a multi-valued data in accordance with a displacement of polarization of a ferroelectric film thereof and detection means connected to a first electrode corresponding to one of an upper electrode and a lower electrode of the ferroelectric capacitor for detecting the displacement of the polarization of the ferroelectric film, comprises a first step of reading the multi-valued data by detecting the displacement of the polarization of the ferroelectric film by the detection means with a reading voltage applied to a second electrode corresponding to the other of the upper electrode and the lower electrode of the ferroelectric capacitor; and a second step of removing the reading voltage applied to the second electrode, and the reading voltage applied in the first step has such magnitude that the displacement of the polarization of the ferroelectric film is restored to that obtained before reading the multi-valued data by eliminating the reading voltage in the second step.
In the first method for driving a semiconductor memory of this invention, the reading voltage applied in the first step has such magnitude that the displacement of the polarization of the ferroelectric film is restored to that obtained before reading the multi-valued data by removing the reading voltage in the second step. Therefore, in reading any multi-valued data stored in the ferroelectric capacitor, the read data is not destroyed, and hence, there is no need to carry out a data rewrite operation. Therefore, there is no need to carry out an operation for changing the polarization direction of the ferroelectric film (polarization reversing operation) after every data read operation. Accordingly, the ferroelectric film of the ferroelectric capacitor is minimally degraded through polarization fatigue, resulting in largely improving the read endurance characteristic of the semiconductor memory.
The first method for driving a semiconductor memory preferably further comprises, after the second step, a third step of making a potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor zero.
When the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor is made zero after the second step, lowering of the potential difference through a resistance component of the ferroelectric capacitor disappears, resulting in improving the retention characteristic during the power is shut-off.
When the first method for driving a semiconductor memory comprises the third step of making the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor zero, the third step preferably includes a sub-step of applying a voltage with polarity different from polarity of the reading voltage to the first electrode before making the potential difference zero.
In this case, even when a voltage is applied for partially reversing the polarization of the ferroelectric film of the ferroelectric capacitor in data read, the magnitude of the polarization charge obtained after data read can be substantially equal to the magnitude of the polarization charge obtained before the data read. As a result, the disturb effect of the semiconductor memory can be largely eliminated.
When the first method for driving a semiconductor memory comprises the third step of making the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor zero, the semiconductor memory preferably includes a switch for equalizing the potentials of the first electrode and the second electrode of the ferroelectric capacitor, and the third step preferably includes a sub-step of making the potential difference zero with the switch.
In this manner, the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor can be easily and definitely made zero after the second step.
When the first method for driving a semiconductor memory comprises the third step of making the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor zero, the semiconductor memory preferably includes a switch for equalizing the potentials of the first electrode of the ferroelectric capacitor and potential, and the third step preferably includes a sub-step of applying a constant potential to the second electrode of the ferroelectric capacitor and making the potential difference zero with the switch.
In this manner, the potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor can be easily and definitely made zero after the second step.
In the first method for driving a semiconductor memory, the reading voltage applied in the first step preferably has such magnitude that a voltage applied between the first electrode and the second electrode of the ferroelectric capacitor when the reading voltage is applied is smaller than a coercive voltage of the ferroelectric capacitor.
In this manner, the displacement of the polarization of the ferroelectric film can be definitely restored to that obtained before reading the data when the reading voltage applied in the first step is eliminated.
In the first method for driving a semiconductor memory, the detection means preferably has a load capacitor, the first step preferably includes a sub-step of applying the reading voltage to both ends of a series circuit composed of the ferroelectric capacitor and the load capacitor, and the detection means preferably detects the displacement of the polarization of the ferroelectric film by detecting a voltage applied to the load capacitor that is obtained by dividing the reading voltage in accordance with a ratio between the capacitance of the ferroelectric capacitor and capacitance of the load capacitor.
In this manner, the reading voltage applied in the first step is divided in accordance with the capacitance ratio between the ferroelectric capacitor and the load capacitor. Therefore, the voltage applied to the ferroelectric capacitor can be easily set to such magnitude that the displacement of the polarization of the ferroelectric film can be restored to that obtained before the data read when the reading voltage is removed.
In the first method for driving a semiconductor memory, the detection means preferably includes a field effect transistor formed on a substrate and having a gate electrode connected to the first electrode of the ferroelectric capacitor, the first step preferably includes a sub-step of applying the reading voltage between the second electrode of the ferroelectric capacitor and the substrate, and the detection means preferably detects the displacement of the polarization of the ferroelectric film by detecting a current flowing between a drain region and a source region of the field effect transistor when a voltage obtained by dividing the reading voltage in accordance with a ratio between the capacitance of the ferroelectric capacitor and the gate capacitance of the field effect transistor is applied to the gate electrode of the field effect transistor.
In this manner, the reading voltage applied in the first step can be divided in accordance with the capacitance ratio between the ferroelectric capacitor and the field effect transistor. Therefore, the voltage applied to the ferroelectric capacitor can be easily set to such magnitude that the displacement of the polarization of the ferroelectric film can be restored to that obtained before the data read when the reading voltage is removed. Furthermore, the displacement of the polarization of the ferroelectric film can be definitely detected by detecting the current flowing between the drain region and the source region of the field effect transistor.
The second method of this invention for driving a semiconductor memory including a plurality of successively connected ferroelectric capacitors each storing a multi-valued data in accordance with a displacement of polarization of a ferroelectric film thereof, a plurality of selecting transistors respectively connected to the plurality of ferroelectric capacitors for selecting the ferroelectric capacitors for reading the multi-valued data, and detection means connected to one end of the plurality of successively connected ferroelectric capacitors for reading the multi-valued data by detecting the displacement of the polarization of the ferroelectric film included in one ferroelectric capacitor selected by the selecting transistors, comprises a first step of applying a reading voltage to one of an upper electrode and a lower electrode of each of the ferroelectric capacitors; and a second step of removing the reading voltage applied to the one electrode, and the reading voltage applied in the first step has such magnitude that the displacement of the polarization of the ferroelectric film is restored to that obtained before reading the multi-valued data by removing the reading voltage in the second step.
In the second method for driving a semiconductor memory of this invention, even when any multi-valued data stored in the ferroelectric capacitors is read, there is no need to carry out a data rewrite operation similarly to the first driving method. Accordingly, the ferroelectric film of the ferroelectric capacitor is minimally degraded through the polarization fatigue, resulting in largely improving the read endurance characteristic of the semiconductor memory.
The second method for driving a semiconductor memory preferably further comprises, after the second step, a third step of making a potential difference between the upper electrode and the lower electrode of the ferroelectric capacitor zero.
In this manner, lowering of the potential difference through a resistance component of the ferroelectric capacitor disappears, resulting in improving the retention characteristic during the power is shut-off.